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9780081005903 - Posseme, Nicolas: Plasma Etching Processes for Interconnect Realization in VLSI
1
Posseme, Nicolas (?):

Plasma Etching Processes for Interconnect Realization in VLSI (?)

Delivery from: Netherlands

ISBN: 9780081005903 (?) or 0081005903, in english, Elsevier Science, New, ebook

BDT 1 ( 88.44)¹(without obligation)
Direct beschikbaar
bol.com
This is the first of two books presenting the challenges and future prospects of plasma etching processes for microelectronics, reviewing the past, present and future issues of etching processes in order to improve the understanding of these issues through innovative solutions.This book focuses on back end of line (BEOL) for high performance device realization and presents an overview of all etch challenges for interconnect realization as well as the current etch solutions proposed in the semico... This is the first of two books presenting the challenges and future prospects of plasma etching processes for microelectronics, reviewing the past, present and future issues of etching processes in order to improve the understanding of these issues through innovative solutions.This book focuses on back end of line (BEOL) for high performance device realization and presents an overview of all etch challenges for interconnect realization as well as the current etch solutions proposed in the semiconductor industry. The choice of copper/low-k interconnect architecture is one of the keys for integrated circuit performance, process manufacturability and scalability. Today, implementation of porous low-k material is mandatory in order to minimize signal propagation delay in interconnections. In this context, the traditional plasma process issues (plasma-induced damage, dimension and profile control, selectivity) and new emerging challenges (residue formation, dielectric wiggling) are critical points of research in order to control the reliability and reduce defects in interconnects. These issues and potential solutions are illustrated by the authors through different process architectures available in the semiconductor industry (metallic or organic hard mask strategies).Presents the difficulties encountered for interconnect realization in very large-scale integrated (VLSI) circuitsFocused on plasma-dielectric surface interactionHelps you further reduce the dielectric constant for the future technological nodes Productinformatie:Taal: Engels;Formaat: ePub met kopieerbeveiliging (DRM) van Adobe;Kopieerrechten: Het kopiëren van (delen van) de pagina's is niet toegestaan ;Geschikt voor: Alle e-readers te koop bij bol.com (of compatible met Adobe DRM). Telefoons/tablets met Google Android (1.6 of hoger) voorzien van bol.com boekenbol app. PC en Mac met Adobe reader software;ISBN10: 0081005903;ISBN13: 9780081005903; Engels | Ebook
seller comment bol.com:
Nieuw, Direct beschikbaar
Platform order number Bol.com: 9200000042570407
Category: School en studie, Techniek en technologie, Elektronica
Data from 06/09/2016 16:00h
ISBN (alternative notations): 0-08-100590-3, 978-0-08-100590-3
9780081005903 - Plasma Etching Processes for Interconnect Realization in VLSI
2

Plasma Etching Processes for Interconnect Realization in VLSI (?)

ISBN: 9780081005903 (?) or 0081005903, in english, Pergamon; Pergamon Press, Vereinigte Staaten von Amerika, New, ebook, digital download

BDT 1 ( 113.59)¹(without obligation)
plus shipping
From Seller/Antiquarian
Seller order number: 23984328
Platform order number Ebook.de (EB): 620784075
Category: eBooks > Sachthemen Ratgeber > Technik
Keywords: NONFICTION ,TECHNIK,ALLGEMEINES ,LEXIKA ,TECHNOLOGY
Data from 06/09/2016 16:00h
ISBN (alternative notations): 0-08-100590-3, 978-0-08-100590-3
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